VSD Intern – Analog Bandgap Reference design using Sky130
VSD Intern – Analog Bandgap Reference design using Sky130, available at $34.99, has an average rating of 3.3, with 28 lectures, based on 31 reviews, and has 260 subscribers.
You will learn about Basics of analog VLSI design General purpose bandgap reference design using Sky130 Circuit design and layout concepts using Sky130 This course is ideal for individuals who are Beginner electronics and telecommunications engineer looking to enter in analog VLSI domain or Professional Physical design and SoC designers who are curious to know about Analog IPs used in their designs It is particularly useful for Beginner electronics and telecommunications engineer looking to enter in analog VLSI domain or Professional Physical design and SoC designers who are curious to know about Analog IPs used in their designs.
Enroll now: VSD Intern – Analog Bandgap Reference design using Sky130
Summary
Title: VSD Intern – Analog Bandgap Reference design using Sky130
Price: $34.99
Average Rating: 3.3
Number of Lectures: 28
Number of Published Lectures: 28
Number of Curriculum Items: 28
Number of Published Curriculum Objects: 28
Original Price: $89.99
Quality Status: approved
Status: Live
What You Will Learn
- Basics of analog VLSI design
- General purpose bandgap reference design using Sky130
- Circuit design and layout concepts using Sky130
Who Should Attend
- Beginner electronics and telecommunications engineer looking to enter in analog VLSI domain
- Professional Physical design and SoC designers who are curious to know about Analog IPs used in their designs
Target Audiences
- Beginner electronics and telecommunications engineer looking to enter in analog VLSI domain
- Professional Physical design and SoC designers who are curious to know about Analog IPs used in their designs
This webinar provides detail about General Purpose Bandgap Reference. The basic working principle of Bandgap reference circuits is explained . The circuit implementation is discussed and the issues with each implementation style is mentioned. Index Terms—Bandgap Reference, CTAT, PTAT, Current mirror, OpAmp.
A Bandgap Reference is a circuit which gives a constant voltage output Vref irrespective of temperature, process and supply voltage variations. It is an especially important component of several analog and mixed signal Integrated Circuits. Several circuits such as LDO, ADC, DAC, Buck convertor. use Bandgap reference as a building block. It provides a constant output reference voltage of 1.2V which is proportional to the Bandgap energy of Silicon(1.2eV)at 0K and hence, gets its name as Bandgap Reference circuit
For detailed information regarding the Bandgap Reference circuit, refer to VLSI System Design website. Below are the details we will be covering in this webinar
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Performance parameters and Circuit implementation of Bandgap Reference IP
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Block Diagram and Schematic
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Steps to download tools on your System
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Pre-Layout Simulation of Bandgap Reference IP circuit using Ngspice
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Vbgp v/s Temperature [ -40C – 140C] @ RL = 100M ohms plot
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Vbgp v/s VDD [ 2V – 4V] @ RL = 100M ohms plot
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Temperature Coefficient of Vbgp v/s Temperature [ -40C – 140C] @ RL = 100M ohms plot
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Voltage Coefficient of Vbgp v/s VDD [ 2V – 4V] @ RL = 100M ohms plot
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Start-Up Time of Vbgp @ RL = 100M ohms plot
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On-Off-Current of Vbgp wrt Enable @ RL = 100M ohms plot
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BGR Layout using Magic
Hope you enjoy the webinar
Course Curriculum
Chapter 1: Introduction
Lecture 1: Introduction
Lecture 2: CTAT, PTAT and BGR
Lecture 3: Start-up enable and full BGR circuit
Chapter 2: Necessary Opensource EDA tool installation
Lecture 1: Installation of tools – Part 1
Lecture 2: Installation of tools – Part 2
Chapter 3: BGR Circuit design and pre-layout simulations using Sky130
Lecture 1: Writing netlist
Lecture 2: Temperature variation plot – Part 1
Lecture 3: Temperature variation plot – Part 2
Lecture 4: Supply variation plot – Part 1
Lecture 5: Supply variation plot – Part 2
Lecture 6: Pre-layout simulations – Part 1
Lecture 7: Pre-layout simulations – Part 2
Chapter 4: BGR Layout Hierarchies
Lecture 1: Building blocks – Part 1
Lecture 2: Building blocks – Part 2
Lecture 3: Placement of blocks – Part 1
Lecture 4: Placement of blocks – Part 2
Lecture 5: Contacts – Part 1
Lecture 6: Contacts – Part 2
Chapter 5: BGR full layout
Lecture 1: Layout connections – Part 1
Lecture 2: Layout connections – Part 2
Lecture 3: Layout connections – Part 3
Lecture 4: Layout connections – Part 4
Lecture 5: Layout connections – Part 5
Lecture 6: Layout connections – Part 6
Chapter 6: BGR post-layout simulations
Lecture 1: Post-layout simulations – Part 1
Lecture 2: Post-layout simulations – Part 2
Lecture 3: Post-layout simulations – Part 3
Chapter 7: Conclusion
Lecture 1: Conclusion
Instructors
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Kunal Ghosh
Digital and Sign-off expert at VLSI System Design(VSD) -
Anmol Purty
VLSI Engineer
Rating Distribution
- 1 stars: 4 votes
- 2 stars: 2 votes
- 3 stars: 3 votes
- 4 stars: 9 votes
- 5 stars: 13 votes
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