High-Speed Board Design Course System On Module -EsteemPCB

Course Curriculum

Chapter 1: Processor Selection, Requirement Sheet Discussion and Datasheet of RK3399 SOC

Lecture 1: Section-1 Documents, Quizzes, images and Project files.

Lecture 2: Processor Packages SOC, SOP, POP, SOM, COB etc. and how to choose a Processor.

Lecture 3: Requirement sheet discussion, selection criteria of processor and types of cores

Lecture 4: Datasheet Discussion of RK3399

Lecture 5: Comparison between different DDRx and LPDDRx types of interfaces for SDRAM

Chapter 2: LPDDR4 Signal Groups and its topologies, RK3399 Datasheet & Push matrix of SDRAM

Lecture 1: Section-2 Documents, Quizzes, images and Project files.

Lecture 2: Some important points about DDR3 & 4 and LPDDR3 & 4

Lecture 3: Discussion on Data Group, Address Command Group, Control Groups, Clock Groups

Lecture 4: Different Layout Topologies for DDR Interface and Mathematical relation of data

Lecture 5: Finish reading the datasheet of Processor RK3399

Lecture 6: Pugh Matrix Parameters for Selecting a LPDDR4 SDRAM

Chapter 3: Selection, Datasheet and Schematic Design of RS512M32LZ4D2ANP, JEDEC JESD209-4

Lecture 1: Section-3 Documents, Quizzes, images and Project files.

Lecture 2: List of Vendors for SDRAM, and How to create Pugh Matrix from list of features

Lecture 3: Reading datasheet of RS512M32LZ4D2ANP-75BT LPDDR4 SDRAM, and JEDEC doc JESD209-4

Lecture 4: Schematic Design of RS512M32LZ4D2ANP-75BT LPDDR4 SDRAM Part-1

Lecture 5: Schematic Design of RS512M32LZ4D2ANP-75BT LPDDR4 SDRAM Part-2

Chapter 4: EMMC & JEDEC JESD84-B51, Types of EMMC, Datasheet and Schematic KLMAG1JETD-B041

Lecture 1: Section-4 Documents, Quizzes, images and Project files.

Lecture 2: What is EMMC, JEDEC document JESD84-B51 for EMMC5,1 standard and types of EMMC

Lecture 3: Types of Nand EMMC in detail, Assignment no 2 to Create EMMC Pugh matrix

Lecture 4: KLMAG1JETD-B041 EMMC Datasheet and Schematic Design

Lecture 5: WLAN WIFI Modules Selection Criteria and Standard discussion in detail for Pugh

Lecture 6: Reading the Datasheet of SDMMC WIFI Module

Chapter 5: Datasheet & Schematic Design of WIFI, Supply & PMU of RK3399, DDR Controller

Lecture 1: Section-5 Documents, Quizzes, images and Project files.

Lecture 2: Schematic design of WIFI Module using Datasheet

Lecture 3: Datasheet of WIFI BT Module and list of Blocks for SOM Board

Lecture 4: Schematic design of Power Supply blocks VDD_GPU, VDD_BIGCPU, VDD_LITCPU, VDD_LOG

Lecture 5: Schematic Design of DDR Controller of RK3399 for LPDDR4 SDRAM

Chapter 6: How to Create Different 25 RK3399 Symbols like: PCIE, ADC, MIPI, HDMI, DDR, EDP

Lecture 1: Section-6 Documents, Quizzes, images and Project files.

Lecture 2: How to create Different Parts of RK3399 using Processor datasheet- Power Supply

Lecture 3: How to create Different Parts of RK3399 using Processor datasheet DDR Controller

Lecture 4: Create Parts of RK3399 using Processor datasheet- PCIE, ADC IN, HDMI, MIPI DSI,

Lecture 5: Parts of RK3399 using Processor datasheet- MIPI CSI, MAC RGMII, UART, SPI, I2C

Chapter 7: Hardware Interfaces I2C, SPI, LVDS, I2S, SDIO, MII, USB, TYPEC, CAMIF, PCIE etc.

Lecture 1: Section-7 Documents, Quizzes, images and Project files.

Lecture 2: Hardware Interfaces introduction and Working- I2C, SPI

Lecture 3: Hardware Interfaces introduction and Working- UART, LVDS

Lecture 4: Hardware Interfaces introduction and Working- I2S, SDIO

Lecture 5: Hardware Interfaces introduction and Working- MII, RMII, GMII, RGMII, XMII, RXMI

Lecture 6: Hardware Interfaces introduction and Working- USB2, TYPEC, CAMIF

Chapter 8: PMIC, ETH PHY Selection, Datasheet and Schematic of RK808, PHY and Layer Stackup

Lecture 1: Section-8 Documents, Quizzes, images and Project files.

Lecture 2: Schematic Design of PMU System Block of RK3399

Lecture 3: Selection Columns of Pugh Matrix for PMIC RK808 and Power Supply Blocks

Lecture 4: Schematic Design of PMIC, Buck Converters, and Ethernet PHY

Lecture 5: Input TypeC Schematic Design, Soft Start and Schematic of 260 Pin DDR4 Connector

Lecture 6: 4L 6L 8L 12L Stack up Discussion and get it verified by Manufacturer

Chapter 9: 12-Layer Stack up, DXF Import, Component Placement Planning and execution

Lecture 1: Section-9 Documents, Quizzes, images and Project files.

Lecture 2: 12L Layer Stackup implementation for SOM

Lecture 3: Board shape using DXF file import, and import Components to PCBDOC

Lecture 4: SOM Board Placement Planning

Lecture 5: Finish the component placement Iteration-1

Lecture 6: Component Placement for SOC schematic block and introduction of Net Class etc

Chapter 10: Complete Component Placement as per Planning.

Lecture 1: Section-10 Documents, Quizzes, images and Project files.

Lecture 2: Solution of Previous assignment no 6 and Component Placement instructions part-1

Lecture 3: Component Placement instructions part-2

Chapter 11: Design Rules for VIAs, Clearances, Track width for RK3399 FANOUT

Lecture 1: Section-11 Documents, Quizzes, images and Project files.

Lecture 2: Completed Placement and Design Rules of VIA, Clearance, Track width for Fanout

Lecture 3: BGA828 Fanout for System Supply Part-1

Lecture 4: Finish Supply Fanout, and Create impedance profile for stackup for 50OHM, 90OHM,

Chapter 12: Layout Planning for RK3399 Signal Groups, Design Rules for DDR Controller PADs

Lecture 1: Section-12 Documents, Quizzes, images and Project files.

Lecture 2: Layout Planning for Byte Groups of LPDDR4 SDRAMs

Lecture 3: Design Rules for LPDDR4 Byte Groups Fanout and Routing

Lecture 4: Layout of Byte Group 1 of Lpddr4 SDRAM

Lecture 5: Layout of Other Byte Group and Instruction for Routing other Highspeed Tracks

Chapter 13: Design Rules Exceptions Length Matching of High-Speed Tracks

Lecture 1: Section-13 Documents, Quizzes, images and Project files.

Lecture 2: Completed High-speed Tracks Layout, Design Rules of highspeed tracks, Priorities

Lecture 3: Length Matching tool introduction and List of Interfaces needs length Matching

Lecture 4: Steps involved in Length match any interface

Lecture 5: Demonstration of Length on LPDDR4