VSD – Static Timing Analysis (STA) Webinar
VSD – Static Timing Analysis (STA) Webinar, available at $34.99, has an average rating of 4.3, with 16 lectures, based on 54 reviews, and has 408 subscribers.
You will learn about Entire STA flow and ECO flow Explore ideas and ways to implement automated ECO flow Calculate performance of your design, just the way industry works, and may be, get a feel of working in a semi-conductor industry This course is ideal for individuals who are Everyone who's interested in working on LIVE designs using open-source STA tool or Everyone who want to know what's the structure of this industry, specially STA or Everyone who would love to explore ways to innovate using open-source tools or Everyone looking to work with me on LIVE project It is particularly useful for Everyone who's interested in working on LIVE designs using open-source STA tool or Everyone who want to know what's the structure of this industry, specially STA or Everyone who would love to explore ways to innovate using open-source tools or Everyone looking to work with me on LIVE project.
Enroll now: VSD – Static Timing Analysis (STA) Webinar
Summary
Title: VSD – Static Timing Analysis (STA) Webinar
Price: $34.99
Average Rating: 4.3
Number of Lectures: 16
Number of Published Lectures: 16
Number of Curriculum Items: 16
Number of Published Curriculum Objects: 16
Original Price: $84.99
Quality Status: approved
Status: Live
What You Will Learn
- Entire STA flow and ECO flow
- Explore ideas and ways to implement automated ECO flow
- Calculate performance of your design, just the way industry works, and may be, get a feel of working in a semi-conductor industry
Who Should Attend
- Everyone who's interested in working on LIVE designs using open-source STA tool
- Everyone who want to know what's the structure of this industry, specially STA
- Everyone who would love to explore ways to innovate using open-source tools
- Everyone looking to work with me on LIVE project
Target Audiences
- Everyone who's interested in working on LIVE designs using open-source STA tool
- Everyone who want to know what's the structure of this industry, specially STA
- Everyone who would love to explore ways to innovate using open-source tools
- Everyone looking to work with me on LIVE project
This time …. Its more personal
You have been very supportive for all these 6 years and I would like to “Thank You” from the bottom of my heart
Now its time to enter your hearts and minds, so we connect for lifetime.
The reason for the success of my webinars and workshops was the
connection that you had with me, and, believe me, that’s tough to build.
It would not have been possible without you believing in me and my
product….
So here I bring the entire webinar ONLINE for you..
We had conducted 4 workshops and 2 webinars on STA in Bangalore, India, where designers and students from Chicago, Minnesota, New York and San-Francisco connected LIVE with me. The webinar was very interactive and couple of mind-blowing ideas and queries came up.
Everyone who attended the webinar and workshops, and myself, ended up with the same feeling….this webinar should go LIVE online so that everyone, including the attendees of my webinar, can re-live the entire experience again and again.
So, I bring this to you. Its LIVE. Its ONE-2-ONE and Its more Personal Coaching as you would see more of interaction rather than one-sided talking. Grab your seat and enjoy the similar experience that we had…
Stay Tuned….
Course Curriculum
Chapter 1: Start Here
Lecture 1: Introduction to open-source C-to-GDS flow
Chapter 2: IC design components
Lecture 1: RTL, floor-planning and power-planning
Lecture 2: Placement and Clock tree synthesis
Lecture 3: Introduction to static timing analysis (STA)
Lecture 4: STA detailing
Chapter 3: Runtime theory and demo
Lecture 1: Design size, RAM and runtime relationship
Lecture 2: Runtime check demo using Opentimer
Chapter 4: Design speed and performance characterization
Lecture 1: Worst negative slack (WNS) and total negative slack (TNS)
Lecture 2: Introduction to term 'performance' and 'clock constraints'
Lecture 3: IO constraints
Lecture 4: Performance measurement using Opentimer
Chapter 5: Timing libraries and engineering change order(ECO)
Lecture 1: Brief description of timing libraries
Lecture 2: Brief description about driver model and receiver model
Lecture 3: Useful tips for operating frequency calculation
Lecture 4: Hold ECO detailed steps with LIVE demo
Chapter 6: Conclusion
Lecture 1: Assignment description and conclusion
Instructors
-
Kunal Ghosh
Digital and Sign-off expert at VLSI System Design(VSD)
Rating Distribution
- 1 stars: 3 votes
- 2 stars: 2 votes
- 3 stars: 11 votes
- 4 stars: 16 votes
- 5 stars: 22 votes
Frequently Asked Questions
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