Applied Computer Architectures

Course Curriculum

Chapter 1: Processor Architecture Basics

Lecture 1: Introduction

Lecture 2: Von Neumann Versus Harvard Architecture

Lecture 3: The MIPS 32 Architecture

Lecture 4: Instructions Encoding

Lecture 5: The 8086 Processor

Lecture 6: The i386 Processor

Chapter 2: The Memory Architecture

Lecture 1: Spatial Temporal Locality

Lecture 2: The Memory Hierarchy

Lecture 3: Memory Technology

Lecture 4: Cache Memory

Lecture 5: Cache Misses & Hits

Lecture 6: Write Procedures

Lecture 7: Replacement Policy

Lecture 8: Replacement Policy Statistics

Lecture 9: Cache Coherence: Snoop Logic

Lecture 10: Cache Performance

Chapter 3: Pipelining

Lecture 1: Why Pipelining?

Lecture 2: The MIPS Pipeline

Lecture 3: Pipeline Speedup

Lecture 4: Pipelining Hazard Types

Lecture 5: Structural Hazards

Lecture 6: Data Hazards

Lecture 7: Control Hazards & Speculative Execution

Lecture 8: Branch Predictors

Lecture 9: Exceptions and Interrupts

Lecture 10: Exceptions in the MIPS Pipeline

Lecture 11: MIPS Architecture with Hazards Detection

Chapter 4: Superscalar Processors

Lecture 1: Introduction

Lecture 2: What are Out of Order Pipelines?

Lecture 3: Instruction Level Parallelism

Lecture 4: ILP Analysis

Lecture 5: True and False Data Dependencies

Lecture 6: Register Renaming: Why and How ?

Lecture 7: Dynamic Scheduling

Lecture 8: Dispatch and Issue

Lecture 9: Issue Policies

Lecture 10: The Reorder Buffer

Lecture 11: In Order Commit

Lecture 12: Reorder Buffer Extensions for Exceptions

Lecture 13: Branch Misprediction in Pipeline Recovery

Chapter 5: Virtual Memory Management

Lecture 1: Introduction

Lecture 2: What is Virtual memory and why use it ?

Lecture 3: Function of a Page Table

Lecture 4: Page Table Architecture

Lecture 5: Memory Address Calculation

Lecture 6: Multilevel Page Table

Lecture 7: Replacement and Writes

Lecture 8: TLB Cache

Lecture 9: TLB and Cache Interaction

Chapter 6: Parallel Processor Architecture

Lecture 1: Introduction

Lecture 2: MMX Instructions

Lecture 3: Vector Processors

Lecture 4: Vector Instruction Set

Lecture 5: Masked Vector Instructions

Lecture 6: Vector Memory Operations

Lecture 7: Multithreading

Chapter 7: Algorithms and Architecture Design

Lecture 1: Introduction

Lecture 2: The Flexibility Efficiency Trade Off

Lecture 3: Is my Algorithm Suitable for a VLSI Architecture?

Lecture 4: Assembling General Purpose and Dedicated VLSI Architectures

Lecture 5: Designing Dedicated VLSI Architectures