Armv8 Architecture: Exception Level and Processor mode

Armv8 Architecture: Exception Level and Processor mode, available at $19.99, has an average rating of 4.05, with 40 lectures, based on 78 reviews, and has 845 subscribers.

You will learn about Primary concept of Exception level and privilege level in Armv8-A How software is running in each exception level Why Linux kernel is running at EL1 and Hypervisor is executing at EL2 How Exception levels are switched during boot sequence How to identify current exception level How exception level is switched by understanding of fault and interrupt handling Learn key features of TrustZone architecture based on exception level How Virtualization is organized based on exception level This course is ideal for individuals who are Professionals interested in exploring Embedded systems or Professionals interested in exploring Armv8 architecture or Hobbyists and students who want to start their career in Embedded world or If you think about 'embedded' then think about taking this course. you will not be disappointed It is particularly useful for Professionals interested in exploring Embedded systems or Professionals interested in exploring Armv8 architecture or Hobbyists and students who want to start their career in Embedded world or If you think about 'embedded' then think about taking this course. you will not be disappointed.

Enroll now: Armv8 Architecture: Exception Level and Processor mode

Summary

Title: Armv8 Architecture: Exception Level and Processor mode

Price: $19.99

Average Rating: 4.05

Number of Lectures: 40

Number of Published Lectures: 40

Number of Curriculum Items: 40

Number of Published Curriculum Objects: 40

Original Price: $19.99

Quality Status: approved

Status: Live

What You Will Learn

Primary concept of Exception level and privilege level in Armv8-A
How software is running in each exception level
Why Linux kernel is running at EL1 and Hypervisor is executing at EL2
How Exception levels are switched during boot sequence
How to identify current exception level
How exception level is switched by understanding of fault and interrupt handling
Learn key features of TrustZone architecture based on exception level
How Virtualization is organized based on exception level

Who Should Attend

Professionals interested in exploring Embedded systems
Professionals interested in exploring Armv8 architecture
Hobbyists and students who want to start their career in Embedded world
If you think about 'embedded' then think about taking this course. you will not be disappointed

Target Audiences

Professionals interested in exploring Embedded systems
Professionals interested in exploring Armv8 architecture
Hobbyists and students who want to start their career in Embedded world
If you think about 'embedded' then think about taking this course. you will not be disappointed

Comprehensive and practical guide to exception levels and exception handling in Armv8-A architecture with TrustZone and virtualization technology

Smartphones, AI System-on-Chip (SoC), Electric Vehicle Automotive system are in Armv8-A based Arm processors. Currently, in the system software industry, knowledge of the Armv8-A architecture is considered essential as it is in high demand. But for system software engineers, there is no lecture covering Armv8-A architecture so far.

This course is for software engineers and students who want to quickly learn how to develop quality software for Armv8-A architecture without reading long technical reference document. The contents of this course covers practical skills or tips which can be applied your real project once you complete this course.

Key features;

This lecture covers the Exception level, that is the key feature of Armv8-A architecture necessary for the development of software systems.

Concept of Exception level
How to change Exception level
System register to identify current Exception Level
Trustzone feature designed in exception state
Virtualization architecture at EL2

Why we need to learn exception level?

There are several reasons why we need to learn exception level.

To understand key features of Armv8 like register, exception, TrustZone and Virtualization
To gain practical understanding of exception handling in Armv8-A
To gain insight over startup code in bootloader
To level up the practical ability for bringup target board
To figure out the software architecture provided by chipset maker and solution provider

If you would like to upgrade engineering ability, this course is right for you.

Course Curriculum

Chapter 1: Introduction to Exception level in Armv8

Lecture 1: Introduction to Exception level in Armv8 architecture

Lecture 2: Exception level-Arm specification review

Lecture 3: Why BSP software engineer should learn Exception Levels?

Chapter 2: How EL0 and EL1 is used in Linux system

Lecture 1: Details of EL0(User application) in Linux system

Lecture 2: Example code at EL0 in Linux system

Lecture 3: Component of Virtualization and TrustZone to understand EL0 change

Lecture 4: Exception level change at EL0 in virtualization (Big picture)

Lecture 5: Details of EL1(Linux kernel) in Linux system

Chapter 3: How Exception levels are used in Hypervisor system

Lecture 1: EL0-User application

Lecture 2: EL1-Guest OS kernel

Lecture 3: EL2-Hypervisor

Lecture 4: EL3-Secure monitor

Chapter 4: Exception handling at EL1(Exception level1)

Lecture 1: Highlight: Exception handling at EL1

Lecture 2: Memory abort Exception handling at EL1

Lecture 3: Memory system in case of Memory abort

Lecture 4: IRQ(Interrupt) Exception handling at EL1

Lecture 5: IRQ(Interrupt) handling – Software point of view

Chapter 5: Exception level switching during boot sequence

Lecture 1: Background: Boot sequence

Lecture 2: Exception level with boot sequence: EL3

Lecture 3: Exception level with boot sequence: EL2

Lecture 4: Exception level with boot sequence: EL1

Lecture 5: Exception level switching with Boot sequence in Hypervisor

Lecture 6: Summary

Chapter 6: How to read exception level – PSTATE.EL and CurrentEL

Lecture 1: About PSTATE.EL

Lecture 2: How to access PSTATE.EL

Lecture 3: Reference code to access CurrentEL

Chapter 7: Arm document review for Bare-metal Boot Code (ARMv8-A)

Lecture 1: ELn switch: EL3 to EL2

Lecture 2: ELn switch: EL2 to EL1

Chapter 8: Mastering Exception level with TRACE32

Lecture 1: Identify exception level and PSTATE

Lecture 2: Read CurrentEL system register to identify exception level

Lecture 3: Enter EL1 from EL0 via SVC instruction

Lecture 4: Enter EL2 from EL1 via HVC instruction

Chapter 9: Introducing processor mode in Aarch32 state

Lecture 1: Introducing Aarch32 state in Armv8-A

Lecture 2: Key features of the Aarch32 state

Lecture 3: Why need to learn about Operating mode (Processor mode)

Chapter 10: Processor mode in the Aarch32 state

Lecture 1: User mode

Lecture 2: Supervisor mode

Lecture 3: IRQ mode and FIQ mode

Lecture 4: Abort mode

Lecture 5: Undefined mode

Instructors

Austin Kim
Arm architecture, Linux kernel instructor

Rating Distribution

1 stars: 2 votes
2 stars: 1 votes
3 stars: 9 votes
4 stars: 31 votes
5 stars: 35 votes

Frequently Asked Questions

How long do I have access to the course materials?

You can view and review the lecture materials indefinitely, like an on-demand channel.

Can I take my courses with me wherever I go?

Definitely! If you have an internet connection, courses on Udemy are available on any device at any time. If you don’t have an internet connection, some instructors also let their students download course lectures. That’s up to the instructor though, so make sure you get on their good side!

Menu