FPGA Embedded Design, Part 3 – EDA Tools

FPGA Embedded Design, Part 3 – EDA Tools, available at $44.99, has an average rating of 3.45, with 74 lectures, based on 48 reviews, and has 906 subscribers.

You will learn about Apply your Verilog knowledge to real applications with FPGAs. Vivado Studio, by Xilinx Quartus Prime, by Intel EDA Playground, by Doulos LabsLand, a remote lab platform This course is ideal for individuals who are Developers curious about FPGA Design. or Embedded Engineers who want to learn about FPGAs. or This course is not for experienced embedded engineers specialized in FPGAs. It is particularly useful for Developers curious about FPGA Design. or Embedded Engineers who want to learn about FPGAs. or This course is not for experienced embedded engineers specialized in FPGAs.

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Summary

Title: FPGA Embedded Design, Part 3 – EDA Tools

Price: $44.99

Average Rating: 3.45

Number of Lectures: 74

Number of Published Lectures: 74

Number of Curriculum Items: 74

Number of Published Curriculum Objects: 74

Original Price: $199.99

Quality Status: approved

Status: Live

What You Will Learn

Apply your Verilog knowledge to real applications with FPGAs.
Vivado Studio, by Xilinx
Quartus Prime, by Intel
EDA Playground, by Doulos
LabsLand, a remote lab platform

Who Should Attend

Developers curious about FPGA Design.
Embedded Engineers who want to learn about FPGAs.
This course is not for experienced embedded engineers specialized in FPGAs.

Target Audiences

Developers curious about FPGA Design.
Embedded Engineers who want to learn about FPGAs.
This course is not for experienced embedded engineers specialized in FPGAs.

It’s time to learn more about FPGA IDEs!

In this third part of the FPGA Embedded Design series, we’ll get our hands on four different EDA Tools to bring our designs to life.

We’ll use four different development tools, and you may follow along with either of them. You may also use an FPGA development board to get the most out of your IDE. We recommend wither the DE0-CV, with a Cyclone V FPGA from Altera/Intel, or the BASYS3, with an Artix7 FPGA from Xilinx.

This course consists of two main parts:

EDA Tools overview, where we’ll cover what EDA Tools are, several examples of commercial and non-commercial tools available.
Hands-On Training, where we’ll give you a walkthrough of each of the following tools: Quartus Prime (by Intel), EDA Playground (by Doulos), Vivado Design Suite (by Xilinx), and LabsLand (a remote Lab tool).

What are you waiting for? Let’s have some fun!!!

Course Curriculum

Chapter 1: Introduction

Lecture 1: Course Structure

Lecture 2: Instructor Introduction

Lecture 3: Motivation 1

Lecture 4: Motivation 2

Chapter 2: Electronic Design Automation Tools

Lecture 1: EDA Tools

Lecture 2: What's EDA?

Lecture 3: Examples of EDA Tools

Lecture 4: Typical Features of EDA Tools

Lecture 5: Schematic Capture

Lecture 6: Simulation

Lecture 7: PCB Design

Lecture 8: Software Development

Chapter 3: EDA Tools for FPGA Development

Lecture 1: EDA Tools for FPGA Development

Lecture 2: The Usual User Steps

Lecture 3: Create a Project

Lecture 4: Write your Code

Lecture 5: Pin Assignment

Lecture 6: The Usual Compiler Steps

Lecture 7: Timing Analysis

Lecture 8: Generating a Programming File

Lecture 9: Downloading your Design into an FPGA

Chapter 4: Quartus Prime, by Intel

Lecture 1: Quartus Prime, by Intel

Lecture 2: About Quartus and Intel

Lecture 3: An Extensive Example of Quartus Prime

Lecture 4: Setup: Downloading Quartus

Lecture 5: Setup: Installing Quartus

Lecture 6: Where Everything Is – Project Navigator

Lecture 7: Where Everything Is – Tasks

Lecture 8: Where Everything Is – IP Catalog

Lecture 9: Setup for Implementation

Lecture 10: Hello World – Create a Project

Lecture 11: Hello World – Top Module Source File

Lecture 12: Hello World – Implementation

Lecture 13: Hello World – Programming the FPGA

Chapter 5: EDA Playground, by Doulos

Lecture 1: EDA Playground, by Doulos

Lecture 2: About EDA Playground and Doulos

Lecture 3: Setup

Lecture 4: EDA Playground Setup

Lecture 5: Walkthrough: Code Entry

Lecture 6: Walkthrough: Left Toolbar

Lecture 7: Walkthrough: Other Tools

Lecture 8: Demo: Code Example

Lecture 9: Demo: Simulation Dump System Tasks

Lecture 10: Demo: Simulation Control System Tasks

Chapter 6: Vivado Design Suite, by Xilinx

Lecture 1: Vivado Design Suite, by Xilinx

Lecture 2: About Vivado Design Suite and Xilinx

Lecture 3: Setup: Downloading Vivado

Lecture 4: Setup: The Vivado Installation Wizard

Lecture 5: Creating a Project

Lecture 6: Walkthrough: Flow Navigator

Lecture 7: Walkthrough: Project Manager

Lecture 8: Walkthrough: IP Catalog

Lecture 9: Walkthrough: Source Files

Lecture 10: Walkthrough: Console Output and Messages

Lecture 11: Walkthrough: Simulation

Lecture 12: Walkthrough: Pin Assignment

Lecture 13: Walkthrough: Top Module Code

Lecture 14: Walkthrough: Bitstream File Generation

Lecture 15: Walkthrough: The Hardware Manager

Chapter 7: LabsLand

Lecture 1: LabsLand

Lecture 2: About LabsLand

Lecture 3: Walkthrough

Lecture 4: FPGA Lab

Lecture 5: Verilog IDE Demo: Pin Assignment

Lecture 6: Verilog IDE Demo: Adder Code

Lecture 7: Verilog IDE Demo: Adder Live Demo

Lecture 8: Verilog IDE Demo: Multiplier Live Demo

Lecture 9: Recompiling

Lecture 10: Uploading Demos

Chapter 8: Wrap Up

Lecture 1: Think of all the things we learned!

Lecture 2: What's Next

Lecture 3: Farewell

Lecture 4: Just for fun

Lecture 5: Bonus Lecture: LabsLand and more from Closure Labs!

Instructors

Eduardo Corpeño
Electrical & Computer Engineer
Marissa Siliezar
Telecom Engineer

Rating Distribution

1 stars: 2 votes
2 stars: 4 votes
3 stars: 9 votes
4 stars: 15 votes
5 stars: 18 votes

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