The Ultimate : Digital System Design ( Module – 2 )

Course Curriculum

Chapter 1: Introduction

Lecture 1: Introduction

Lecture 2: Introduction to Digital Circuits

Lecture 3: Half adder and Procedure to design combinational circuits

Lecture 4: Half adder using NAND and NOR Gates

Lecture 5: Half Subtractor

Lecture 6: Full Adder

Lecture 7: Full Adder using NAND gates

Lecture 8: Full Subtractor

Chapter 2: Parallel Adders and Subtractors

Lecture 1: Parallel Adder

Lecture 2: Parallel Subtractor

Lecture 3: Parallel Adder/Subtractor

Lecture 4: Delay of Parallel Adder

Lecture 5: Look Ahead Carry Adder

Lecture 6: Look Ahead Carry Adder – 1

Chapter 3: MULTIPLEXER and De-MULTIPLEXER

Lecture 1: Multiplexer introduction and 2:1 MUX

Lecture 2: Design of all gates using MUX

Lecture 3: 4:1 Multiplexer

Lecture 4: Problems on Multiplexers

Lecture 5: Problems on Multiplexers – 1

Lecture 6: 4:1 MUX and 8:1 MUX using 2:1 MUX

Lecture 7: 16:1 MUX using 4:1 MUX

Lecture 8: De-Multiplexer

Chapter 4: DECODERS AND ENCODERS

Lecture 1: Decoders ( 2:4 Decoders)

Lecture 2: 3 : 8 Decoder and Active Low output Decoder

Lecture 3: Design of combinational circuit using decoders

Lecture 4: Design of combinational circuit using decoders1

Lecture 5: D4 : 16 decoder using 2 : 4 decoder

Lecture 6: ENCODERS ( 4 : 2 Encoder)

Lecture 7: Priority Encoder

Lecture 8: Comparator Digital Circuit

Lecture 9: Comparator Digital Circuit – 1

Chapter 5: SEQUENTIAL CIRCUITS

Lecture 1: Introduction

Lecture 2: LATCH Circuit and Operation

Lecture 3: NAND Latch

Lecture 4: NOR Latch

Lecture 5: NOR Latch – 1

Lecture 6: Set-Reset (SR) Flip Flop

Lecture 7: Set-Reset (SR) Flip Flop – 1

Lecture 8: J K Flip Flop

Lecture 9: J K Flip Flop – 1

Lecture 10: J K Flip Flop – 2

Lecture 11: T-FF (TOGGLE FLIP FLOP )

Lecture 12: Delay Flip Flop ( D-FF)

Chapter 6: Flip Flop Conversion

Lecture 1: FLIP FLOP CONVESION ( JK-FF TO D-FF)

Lecture 2: D-FF to others ( D-FF to J K, T )

Lecture 3: SR-FF to JK-FF and D-FF to T-FF CONVERSION

Lecture 4: T-FF TO JK-FF CONVERSION

Lecture 5: TRIGGERING (CLOCK SIGNAL)

Lecture 6: TRIGGERING (CLOCK SIGNAL)

Lecture 7: RACE AROUND CONDITION ( RAC ) AND MASTER-SLAVE JK FF

Chapter 7: COUNTERS

Lecture 1: INTRODUCTION ( COUNTERS)

Lecture 2: ASYNCHRONOUS COUNTERS ( 2-BIT RIPPLE COUNTER)

Lecture 3: 2-BIT RIPPLE COUNTER USING +VE AND -VE EDGE TRIGGERING

Lecture 4: IMPORTANT POINTS FROM ASYNCHRONOUS COUNTERS

Lecture 5: 3 – bit ripple counter ( MOD – 8 Ripple Counter)

Lecture 6: MOD – K Counter and Asynchronous inputs of flip flop

Lecture 7: (MOD-10)Modulus 10 Counter ( Decade counter)

Lecture 8: UP/DOWN Counter

Lecture 9: Problems on Asynchronous Counter

Chapter 8: SYNCHRONOUS COUNTERS and REGISTERS

Lecture 1: Introduction to Synchronous Counters

Lecture 2: Ring Counter

Lecture 3: TWISTED RING COUNTER( JOHNSON COUNTER)

Lecture 4: DESIGN OF SYNCHRONOUS COUNTER

Lecture 5: MOD – 6 BINARY COUNTER( SYNCHRONOUS) USING T-FF

Lecture 6: SELF STARTING RING COUNTER

Lecture 7: REGISTERS

Lecture 8: SISO( Serial Input Serial Output)

Lecture 9: TYPES OF REGISTERS(SIPO,PIPO,PISO)

Lecture 10: UNIVERSAL SHIFT REGISTER

Lecture 11: UNIVERSAL SHIFT REGISTER – 1

Lecture 12: Problems on counters

Lecture 13: Problems on counters-1

Chapter 9: STATE DIAGRAMS

Lecture 1: INTRODUCTION TO STATE DIAGRAMS

Lecture 2: MEALY AND MOORE DIAGRAMS

Lecture 3: STATE DIAGRAMS OF FLIPFLOPS

Lecture 4: STATE DIAGRAMS OF FLIPFLOPS-1

Lecture 5: PROBLEMS ON STATE DIAGRAMS

Lecture 6: PROBLEMS ON STATE DIAGRAMS-1